2/6/2024 9:45:46 AM
Summary: Each device contains an 8-bit SIPO shift register and an 8-bit D-type storage register.
The SN74AHCT165/SN74AHCT165-q1 serial input/parallel output (SIPO) shift register contains an 8-bit serial input, parallel output shift register. Each register provides an 8-bit D-type storage register. These storage registers have parallel tri-state outputs. Separate clocks are provided for both storage registers and shift registers. The shift register has a serial (SER) input, a direct override clear (SRCLR) input, and a serial output for cascading. When the Output Enable (OE) input is high, all outputs (except QH) are in a high-impedance state. The Texas Instruments SN74AHCT165-Q1 device is qualified for AEC-Q100 automotive applications.
Operating range 4.5V to 5.5VV(CC)
TTL-compatible input
Low latency, 7ns (25°C, 5V)
Over 250mA latch performance per JESD 17
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