2/14/2024 9:20:53 AM
Summary: Texas Instruments' AM68 Arm Cortex-A72 MCU is designed for cost-sensitive high-performance computing applications in areas such as factory/building automation.
Texas Instruments' AM68 scalable processor is based on the improved Jacinto 7 architecture and is designed for smart vision cameras and general computing applications. The AM68x series is designed for a variety of cost-sensitive high-performance computing applications in factory automation, building automation and other fields.
AM68 provides high-performance computing technology for traditional and deep learning algorithms with an industry-leading power/performance ratio, with a high level of system integration, scalability and low cost for advanced vision camera applications. Key cores include Arm and GPU processors for general-purpose computing, next-generation DSPs with scalar and vector cores, dedicated deep learning and legacy algorithm accelerators, integrated next-generation imaging subsystems (ISPs), video codecs and isolated MCU island. The core is protected by industrial-grade security and secure hardware accelerators.
The independent dual-core cluster configuration of the Arm Cortex-A72 simplifies multi-OS applications with minimal need for software hypervisors. Up to two Arm Cortex-R5F subsystems support low-level, timing-critical processing tasks, making the Arm Cortex-A72 core unencumbered by applications. Building on existing world-class ISPs, TI's 7th generation ISPs include the flexibility to handle a broader suite of sensors, higher bit depth support, and capabilities for analytics applications. Integrated diagnostics and safety functions support operation up to SIL-2 level, and integrated safety functions protect data from attacks. CSI2.0 port supports multi-sensor input.
The C7000 DSP next-generation core ("C7x") combines TI's industry-leading DSP and EVE cores into a high-performance core and adds floating-point vector computing capabilities to simplify software programming while enabling legacy code backwards compatibility. Dedicated vision hardware accelerators provide vision preprocessing without impacting system performance. The C7x/MMA core can be used for deep learning functions on AM68 class processors.
processor:
Dual 64-bit Arm Cortex-A72 microprocessor subsystem up to 2 GHz
Vision Processing Accelerator (VPAC) and Image Signal Processor (ISP) and multiple vision-assisted accelerators
Dual-core Arm Cortex-R5F mcu, up to 1.0 GHz, supports FFI and device management
multimedia:
Display subsystem support
3D graphics processing unit
2 CSI2.0 4L camera serial ports
Video encoder/decoder
Technology: 16nm FinFET
Package: 23mm x 23mm, 0.8 mm pitch, 770-pin FCBGA (ALZ)
Memory subsystem:
On-chip L3 RAM: 4 MB max ECC and coherency
Up to two External Memory Interface (EMIF) modules with ECC
Universal memory controller
Main domain up to 2 on-chip SRAM: 512 KB, ECC protected
Device security
High-speed serial interface:
1 PCIe Gen3 controller
A USB 3.0 Dual Role Device (DRD) subsystem
Two CSI2.04L RX plus two CSI2.04L TX
Two Ethernet RMII/RGMII interfaces
flash memory interface
Machine vision cameras and computers
Smart shopping cart
retail automation
smart agriculture
Video Surveillance
traffic monitoring
Autonomous Mobile Robot (AMR)
pilot-less airplane
industrial transportation
Industrial Human Machine Interface (HMI)
Industrial computer
single board computer
Patient monitoring and medical equipment
Phone